BACKGROUND AND GIST OF THE BILL 

Electronics and Information Technology is one of the fastest growing sectors that has played a significant role in the world economy. This was primarily due to the advancement in the field of electronics, computers and telecommunications. Microelectronics has rightly been recognized as a core strategic technology world over, especially for the Information Technology (IT) based society. To encourage continued investment in R&D leading to technological advancements in the field of microelectronics, protection of Intellectual Property Rights is of utmost importance.

2.Initially the classification of Integrated Circuits (ICs) complexity was by gate count only.Typically a gate is an electronic circuit using transistors.This type of classification led to Small Scale Integration (SSI - upto 30 gates), Medium Scale Integration (MSI - upto 300 gates), Large Scale Integration (LSI - upto 3,000 gates) and Very Large Scale Integration (VLSI - upto 30,000 gates).However, there are other ways to classify levels of ICs, such as pin count, chip die size, transistor geometry dimension, functionality etc. Irrespective of the scheme of classification, a semiconductor integrated circuit is the process of creating floor plan of transistors called the Layout-Design using set of masks.Since Layout-Design could be arrived in any manner, it is the Layout- Design which is an Intellectual Property by itself.Hence, there is a need to protect the Layout-Design of Integrated Circuits.

3.The existing practices of providing protection through the methods of Copy Right and Patents do not appropriately accommodate the requirements of Intellectual Property Rights Protection for the Layout-Design of Integrated Circuits. This is because in the context of Layout-Design of Integrated Circuits the concept of "originality" is of utmost significance, whether it is"novel or not";the Patent Law requires that the idea should be original as well as novel. The copyright law is too general to accommodate the original ideas of scientific creation of Layout-Designs of Integrated Circuits. Hence, the requirement of this Bill. Under the environment of guarantee of protection, the experience world over shows that the creator of the Layout-Design is more confident towards the transfer of technology by allowing its reproduction. The necessity for providing protection for the Layout-Designs of Integrated Circuits arises to reward and encourage an adequate level of investment of human, financial and technological resources.

4.The majority of countries that attach significance to protection of Intellectual Property Rights in the Semiconductor Integrated Circuits provide for a "sui generis" of its kind, unique protection of Layout-Designs of Integrated Circuits which is usually contained in a separate Act. The World Trade Organisation (WTO) agreement which was ratified by India has provisions for Trade Related Intellectual Property Rights (TRIPS) with regard to setting up of standards concerning availability, scope and use of Intellectual Property Rights, Geographical Indications, Layout-Design of Integrated Circuits etc. As one of the signatories of WTO, India is also expected to align its laws in accordance with the TRIPS Agreement and formulate suitable legislation.

5.The salient features of the Bill are summarized below:

(i)The Bill provides for protection of Semiconductor Integrated Circuits Layout-Designs by process of registration.

(ii)The Bill provides for mechanism for distinguishing Layout-Designs, which can be protected.

(iii)The Bill provides for rules to prohibit registration of Layout-Designs which are not original and/or which have been commercially exploited.

(iv)The Bill provides for a period of ten years as a term of protection of Layout- Designs.

(v)The Bill has provision with regard to infringement, evidence of validity including power of registered proprietor for assignment and transmission.

(vi)    The Bill provides for payment of royalty for registered Layout-Design and also has a provision for determination of royalty payment for innocent infringement.

(vii)The Bill provides for dealing with willful infringement by way of punishment with imprisonment for a term which may extend to three years, or with fine which shall not be less than fifty thousand rupees but will not exceed ten lakh rupees or with both.

(viii)The Bill provides for appointing a Registrar for registering the layout-designs.

(ix)The Bill provides for mechanism of Appellate Board consisting of Chairman, Vice-Chairman and such other members as the Central Government may deem fit.